jochen
be92762969
The live tests reached one shared bus and assert, read and remove the mesh's own objects by their fixed names, so packages run in parallel deleted what each other read and the suite passed only one package at a time; a red suite read as noise. internal/testbus starts a server per test, linked in at the nats-server release go.mod pins, and a test holds that pin to the catalogue's bus image and to the facts snapshot's bus when there is one, so the tests never run a bus the mesh does not. The waiter test read a timing (the most connections held at one look) and now reads the state it means (the fewest held across the wait). make check runs the packages in parallel under the race detector, with a timeout.
183 lines
4.7 KiB
ArmAsm
183 lines
4.7 KiB
ArmAsm
//
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// Minio Cloud Storage, (C) 2018 Minio, Inc.
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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//
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//+build !noasm,!appengine
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#include "textflag.h"
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// Definition of registers
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#define V0_LO VS32
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#define V0_LO_ V0
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#define V0_HI VS33
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#define V0_HI_ V1
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#define V1_LO VS34
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#define V1_LO_ V2
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#define V1_HI VS35
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#define V1_HI_ V3
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#define MUL0_LO VS36
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#define MUL0_LO_ V4
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#define MUL0_HI VS37
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#define MUL0_HI_ V5
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#define MUL1_LO VS38
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#define MUL1_LO_ V6
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#define MUL1_HI VS39
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#define MUL1_HI_ V7
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// Message
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#define MSG_LO VS40
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#define MSG_LO_ V8
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#define MSG_HI VS41
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// Constants
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#define ROTATE VS42
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#define ROTATE_ V10
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#define MASK VS43
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#define MASK_ V11
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// Temps
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#define TEMP1 VS44
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#define TEMP1_ V12
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#define TEMP2 VS45
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#define TEMP2_ V13
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#define TEMP3 VS46
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#define TEMP3_ V14
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#define TEMP4_ V15
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#define TEMP5_ V16
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#define TEMP6_ V17
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#define TEMP7_ V18
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// Regular registers
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#define STATE R3
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#define MSG_BASE R4
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#define MSG_LEN R5
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#define CONSTANTS R6
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#define P1 R7
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#define P2 R8
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#define P3 R9
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#define P4 R10
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#define P5 R11
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#define P6 R12
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#define P7 R14 // avoid using R13
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TEXT ·updatePpc64Le(SB), NOFRAME|NOSPLIT, $0-32
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MOVD state+0(FP), STATE
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MOVD msg_base+8(FP), MSG_BASE
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MOVD msg_len+16(FP), MSG_LEN // length of message
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// Sanity check for length
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CMPU MSG_LEN, $31
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BLE complete
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// Setup offsets
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MOVD $16, P1
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MOVD $32, P2
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MOVD $48, P3
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MOVD $64, P4
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MOVD $80, P5
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MOVD $96, P6
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MOVD $112, P7
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// Load state
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LXVD2X (STATE)(R0), V0_LO
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LXVD2X (STATE)(P1), V0_HI
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LXVD2X (STATE)(P2), V1_LO
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LXVD2X (STATE)(P3), V1_HI
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LXVD2X (STATE)(P4), MUL0_LO
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LXVD2X (STATE)(P5), MUL0_HI
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LXVD2X (STATE)(P6), MUL1_LO
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LXVD2X (STATE)(P7), MUL1_HI
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XXPERMDI V0_LO, V0_LO, $2, V0_LO
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XXPERMDI V0_HI, V0_HI, $2, V0_HI
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XXPERMDI V1_LO, V1_LO, $2, V1_LO
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XXPERMDI V1_HI, V1_HI, $2, V1_HI
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XXPERMDI MUL0_LO, MUL0_LO, $2, MUL0_LO
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XXPERMDI MUL0_HI, MUL0_HI, $2, MUL0_HI
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XXPERMDI MUL1_LO, MUL1_LO, $2, MUL1_LO
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XXPERMDI MUL1_HI, MUL1_HI, $2, MUL1_HI
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// Load asmConstants table pointer
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MOVD $·asmConstants(SB), CONSTANTS
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LXVD2X (CONSTANTS)(R0), ROTATE
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LXVD2X (CONSTANTS)(P1), MASK
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XXLNAND MASK, MASK, MASK
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loop:
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// Main highwayhash update loop
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LXVD2X (MSG_BASE)(R0), MSG_LO
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VADDUDM V0_LO_, MUL1_LO_, TEMP1_
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VRLD V0_LO_, ROTATE_, TEMP2_
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VADDUDM MUL1_HI_, V0_HI_, TEMP3_
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LXVD2X (MSG_BASE)(P1), MSG_HI
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ADD $32, MSG_BASE, MSG_BASE
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XXPERMDI MSG_LO, MSG_LO, $2, MSG_LO
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XXPERMDI MSG_HI, MSG_HI, $2, V0_LO
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VADDUDM MSG_LO_, MUL0_LO_, MSG_LO_
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VADDUDM V0_LO_, MUL0_HI_, V0_LO_
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VADDUDM MSG_LO_, V1_LO_, V1_LO_
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VSRD V0_HI_, ROTATE_, MSG_LO_
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VADDUDM V0_LO_, V1_HI_, V1_HI_
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VPERM V1_LO_, V1_LO_, MASK_, V0_LO_
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VMULOUW V1_LO_, TEMP2_, TEMP2_
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VPERM V1_HI_, V1_HI_, MASK_, TEMP7_
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VADDUDM V0_LO_, TEMP1_, V0_LO_
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VMULOUW V1_HI_, MSG_LO_, MSG_LO_
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VADDUDM TEMP7_, TEMP3_, V0_HI_
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VPERM V0_LO_, V0_LO_, MASK_, TEMP6_
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VRLD V1_LO_, ROTATE_, TEMP4_
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VSRD V1_HI_, ROTATE_, TEMP5_
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VPERM V0_HI_, V0_HI_, MASK_, TEMP7_
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XXLXOR MUL0_LO, TEMP2, MUL0_LO
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VMULOUW TEMP1_, TEMP4_, TEMP1_
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VMULOUW TEMP3_, TEMP5_, TEMP3_
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XXLXOR MUL0_HI, MSG_LO, MUL0_HI
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XXLXOR MUL1_LO, TEMP1, MUL1_LO
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XXLXOR MUL1_HI, TEMP3, MUL1_HI
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VADDUDM TEMP6_, V1_LO_, V1_LO_
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VADDUDM TEMP7_, V1_HI_, V1_HI_
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SUB $32, MSG_LEN, MSG_LEN
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CMPU MSG_LEN, $32
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BGE loop
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// Save state
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XXPERMDI V0_LO, V0_LO, $2, V0_LO
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XXPERMDI V0_HI, V0_HI, $2, V0_HI
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XXPERMDI V1_LO, V1_LO, $2, V1_LO
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XXPERMDI V1_HI, V1_HI, $2, V1_HI
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XXPERMDI MUL0_LO, MUL0_LO, $2, MUL0_LO
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XXPERMDI MUL0_HI, MUL0_HI, $2, MUL0_HI
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XXPERMDI MUL1_LO, MUL1_LO, $2, MUL1_LO
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XXPERMDI MUL1_HI, MUL1_HI, $2, MUL1_HI
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STXVD2X V0_LO, (STATE)(R0)
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STXVD2X V0_HI, (STATE)(P1)
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STXVD2X V1_LO, (STATE)(P2)
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STXVD2X V1_HI, (STATE)(P3)
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STXVD2X MUL0_LO, (STATE)(P4)
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STXVD2X MUL0_HI, (STATE)(P5)
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STXVD2X MUL1_LO, (STATE)(P6)
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STXVD2X MUL1_HI, (STATE)(P7)
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complete:
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RET
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// Constants table
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DATA ·asmConstants+0x0(SB)/8, $0x0000000000000020
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DATA ·asmConstants+0x8(SB)/8, $0x0000000000000020
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DATA ·asmConstants+0x10(SB)/8, $0x070806090d0a040b // zipper merge constant
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DATA ·asmConstants+0x18(SB)/8, $0x000f010e05020c03 // zipper merge constant
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GLOBL ·asmConstants(SB), 8, $32
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